FIG. 1 diagrammatically illustrates the circuit configuration of a conventional RF analog class-C power amplifier comprising a bipolar transistor 11, the base and collector terminals 13 and 15 of which are respectively coupled to associated analog matching inductance-capacitance (LC) networks or tank circuits 21 and 23 for establishing the operational parameters of the circuit. Specifically, the output or collector-connected analog (LC) network 23 is tuned to provide a resonance output voltage in response to the input sinusoidal drive. The duration of the base conduction occupies a limited portion of the output duty cycle (typically less than 180.degree. for class-C operation), so as to minimize power consumption by power transistor 11.
As transistor 11 is driven into saturation during each cycle, input analog matching network 21 is designed to provide a path for removing or `dumping` excess charge accumulated at the collector-base PN junction of bipolar transistor 11 due to the collector saturation effect. Since it can be expected that associated signal processing circuitry prior to the power amplifier will be digitally configured, the need to employ analog circuit components (inductors and capacitors) to implement the input matching network adds unwanted circuit complexity, size and cost to the overall power amplifier architecture.